Filp Flops

In: Computers and Technology

Submitted By BIPIN1234
Words 689
Pages 3
Flip-Flops
Basic concepts

Flip-Flops


A flip-flop is a bi-stable device: a circuit having 2 stable conditions (0 or 1)



3 classes of flip-flops






latches: outputs respond immediately while enabled (no timing control) pulse-triggered flip-flops: outputs response to the triggering pulse edge-triggered flip-flops: outputs responses to the control input edge
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Conventions
  



The circuit is set means output = 1 The circuit is reset means output = 0 Flip-flops have two output Q and Q′ or (Q and Q) Due to time related characteristic of the flipflop, Q and Q′ (or Q) are usually represented as followed:
 

Qt or Q: present state Qt+1 or Q+: next state
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4 Types of Flip-Flops
SR flip-flop
S 0 0 1 1 R 0 1 0 1 Qt+1 Qt 0 1 Q’t+1 Q’t 1 0

JK flip-flop
J 0 0 1 1 K 0 1 0 1 Qt+1 Qt 0 1 Q’t Q’t+1 Q’t 1 0 Qt

Prohibited

D flip-flop
D 0 1
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T flip-flop
Q’t+1 1 0
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Qt+1 0 1

T 0 1

Qt+1 Qt Q’t

Q’t+1 Q’t Qt
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SR Latch
An SR (or set-reset) latch consists of
  

S (set) input: set the circuit R (reset) input: reset the circuit Q and Q’ output: output of the SR latch in normal and complement form
S 0 0 1 1 R 0 1 0 1 Qt+1 Qt 0 1 Q’t+1 Q’t 1 0

Prohibited

Application example: a switch debouncer
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SR latch

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An application of the SR latch
(a) Effects of contact bounce.

(b) A switch debouncer.

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SR latch

!

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Gated SR latch

(c)

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Gated D latch

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Timing Consideration
When using a real flip-flop, the following information is needed to be considered:






propagation delay (tpLH, tpHL) - time needed for an input signal to produce an…...

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